Need Help- Project Proposal

Need Help- Project Proposal on 

Dual Port RAM Implementation for Hack Computer on a FPGA

RAM subsystems Block Level Diagram and Description for VHDL Hack Computer using an FPGA device



A computer has many different kinds of memory that are used to hold data and programs. Random access memory (RAM) is a type of computer memory that is volatile and it is used to hold computer instructions just before and immediately after processing. It is referred to as random because the time it takes to access any piece of data is independent of the data’s physical location. In other words it can access data at an address directly without sequentially looking at each address location to find a specific piece of data.

A computer is supposed to carryout complex arithmetic computation in the CPU. Registers, although fast, can only store a few instructions. RAM has a large amount of memory compared to CPU registers, this enables them to store a lot of information that has just been processed or that is yet to be processed.


Overarching Hack Computer Design Diagram


Computer RAM Architecture

A RAM block is composed of smaller RAM chips, or memory mapped I/O devices. The registers store the data to be used and the direct access logic unit provides the logic to search for the needed data.


Our RAM design has four (4) inputs, a clock signal, and two (2) outputs. The four (4) inputs are rw_load input that selects whether the operation will be read or write, a write data input, an address input from the CPU, and a read only address input from the VGA controller. The rw_clock signal syncs the timing for all read and write inputs and outputs and the ro_clock syncs the timing for the VGA controller read operations. One output is a read only for the VGA controller. The other output feeds the input of the hack CPU. The multiple inputs and outputs could be accomplished using the True dual-port RAM mode.


True dual-port RAM allows the following features

  • Simultaneous two reads.
  • Simultaneous two writes.
  • Simultaneous one read and one write at two different clock frequencies.


So in reality, there will need to be an additional load input (ro_load) and a data input (ro_data) within the RAM subsystem to accommodate the VGA controller.


In the case of a read operation (rw_load = 0), the RAM’s output immediately emits the value of the selected register.

In the case of a write operation (rw_load = 1), the selected memory register commits to the input value in the next time unit, at which point the RAM’s output will start emitting it.

The basic design parameters of a RAM device are its data width—the width of each one of its words, and its size—the number of words in the RAM. Modern computers typically employ 32- or 64-bit-wide RAMs whose sizes are up to hundreds of millions.


Our RAM configuration consists of:


  1. rw_data – incoming data to be written.
  2. rw_address – specifies the address or location to read from or write to.
  • ro_address – specifies the address or location to give to the VGA controller.
  1. rw_load – selects between reading from, or writing to the memory.
  2. rw_out – outgoing data to be read by the CPU.
  3. ro_out – outgoing data to be read by the VGA controller.



Read Operation

One of the basic operations on a RAM is to read or get stored information. The following steps need to be performed during a read operation from RAM:

  1. Select the read operation by ensuring the “rw_load” is set to 0.
  2. Send the desired address to the address input
  • The contents of that address appear on the appropriate “out” (rw_out or ro_out) after a little while.

In the read operation, the “rw_data” input is not used for read operations.



Write Operation

Another important function of the RAM is to write or store information. This can be achieved by the write operation. Here are the necessary steps involved.

  1. Write operation is selected by setting rw_load = 1.
  2. Send the address where data/word is to be written to the address input.
  • Word to be stored is sent to the “rw_data” input.


Project Proposal

Hack Computer System

Development of the 16-bit Hack microprocessor computer architecture in FPGA.

Figure 1. Hack Computer Architecture. Reprinted from Elements of Computing Systems (p. 97), by N. Nisan & S. Schocken, 2008, Cambridge, MA: The MIT Press. Copyright 2005 by The Massachusetts Institute of Technology.



Executive Summary


The Elements of Computing Systems is an academic textbook that proposes the simplified Hack microprocessor architecture as a tool to learn about the full spectrum of computer engineering, “from Nand to Tetris”, with a hands-on, implementation-focused approach. Throughout the textbook, the content is explored using academic HDL languages, hardware emulation, and software simulation tools. Our objective is to implement the Hack computer architecture in hardware using a Field Programmable Gate Array (FPGA) device.

We have setup our project using a three-phased approach. The first phase of the project is to develop the computer architecture, screen & keyboard interfaces, and assembler. The second phase of the project is to develop a virtual machine and compiler for the Jack programming language proposed in the Elements of Computing Systems. Finally, the third phase of the project is to develop the operating system and a high level application for the Hack computer architecture using Jack.

Table of Contents

Executive Summary. ii

Table of Figures. iv

Introduction. 5

Project Description. 5

Project Objectives. 6

System Requirements. 6

Similar Designs. 6

Customer Profile. 7

Environment Profile. 7

Feasibility Discussion. 8

Regulatory Requirements. 8

List of Materials. 8

Risks Identified. 10

Resource Requirements. 11

Project Design. 11

Test Plans. 11

Test Results. 11

Project Work Breakdown Structure. 11

Project Schedule. 14

Standards Used. 14

Ethical and Societal Issues. 14

Lessons Learned. 14

Personnel 15

Works Cited. 20

Works Consulted. 21

Appendix A: Weekly Progress Reports. 22

Appendix B: Any Data / Source Code, etc. 34

Appendix C: Datasheets. 34


Table of Figures

Figure 1. Hack Computer Architecture. Reprinted from Elements of Computing Systems (p. 97), by N. Nisan & S. Schocken, 2008, Cambridge, MA: The MIT Press. Copyright 2005 by The Massachusetts Institute of Technology. i

Figure 2. Example test bench for DP32 processor. Reprinted from The VHDL Cookbook (p. 7-18), by P. Ashenden. Copyright 1990. 8




The project we will be working on will be designing, testing, and implementing a working computer using an FPGA board, VGA monitor, and PS/2 keyboard. We will be following the steps outlined in the book, The Elements of Computing Systems, by Noam Nisan and Shimon Schocken. One of the authors of The Elements of Computing Systems, Noam Nisan, is a computer science professor at the Hebrew University of Jerusalem. He has published four books and many academic articles. The co-author of the book, Shimon Schocken, is computer science professor at the Efi Arazi School of Computer Science in Israel. He has published one book and several academic articles.

The operating system and drivers to make our computer operational will be coded using the VHDL language. Our computer will be built following the Hack computer architecture. The Hack computer is a simple machine comprised of existing components, but can be a powerful computing system, illustrating the key operating principles and hardware elements of any digital computer; the Hack computer is a 16-bit machine made up of a CPU, instruction and data memory, and two memory-mapped I/O devices (Nisan and Schocken, 2005).

We will break the implementation of our Hack computer into 3 phases; for the first phase we plan on having an operational computer with basic functions, for the second phase we plan on being able to run a simple program, and for the third phase we plan to be able to run a more complicated program. For each phase of the project, the team will divide tasks to be completed; one person will design, the next person will test, and the third person will implement. We will rotate who does what so that each person of the team will have a chance to perform each of the steps.

This project is designed to give us a deeper understanding of how modern computers work, and how the programmer can control the computer’s actions. We will also gain a great deal of knowledge in programming, and specifically coding with VHDL. Since we are using existing hardware, we will be doing mainly programming in this project. The only hardware design we may be involved in is creating an interface for a monitor or keyboard, but we have chosen FPGA boards that have these interfaces built in already.

Project Description


Phase 1

Phase 1 of the project involves incremental implementation of the Hack hardware platform. The platform consists of several major subsystems including:

  • The Hack CPU
  • ROM & RAM
  • The VGA Controller
  • The PS/2 Controller

Each subsystem will need to be designed and tested independently. Once testing of all subsystems is completed the must be integrated into the hardware platform.

Lastly, an assembler must be developed to generate the necessary files to initialize the Hack Computer’s ROM and enable it to run software written in Hack Assembly language.

The conclusion of phase 1 is to show that hardware platform can run a Hack Assembly program and interface with a keyboard and monitor.

Phase 2

Phase 2 of the project involves the development and testing of a Virtual Machine and Compiler for the Jack high-level programming language on the Hack hardware architecture. The Jack programming language is a basic object oriented programming language intended to be similar to Java.

The conclusion of phase 2 is to show that the compilation process has worked successfully by compiling a basic Jack program and running it on the Hack Computer System.

Phase 3

Phase 3 of the project involves the development and testing of an Operating System / Standard Library and a custom Application for the Hack hardware system. The Operating system consists of a collection of functions that allow the programming to utilize standard arithmetic, I/O, and graphical functions with the Jack programming language.

Lastly, with the operating system completed, the Hack hardware platform will be a fully functional computer system.

The conclusion of phase 3 is to develop a custom application such as a game to exhibit the capabilities of the Hack computer.


Project Objectives

Provide the objectives of the project/product. What will be accomplished and to what extent. Describe project deliverables.

Suggestion: describe project objectives in broader description than previous bulleted list. Example: Implement Hack Computer Architecture on DE0-CV FPGA Development board, Complete phase 1 at minimum by end of senior project,  etc.



System Requirements


We will be using existing hardware to implement this project. The following are the requirements for the system:

  • FPGA board with Cyclone III or higher microprocessor.
    • Instruction Memory – 32kb
    • Data Memory – 32kb
    • Register A – 16-bit
    • Register D – 16-bit
    • Keyboard Memory – 16-bit
    • Monitor Memory – 8kb
  • VGA monitor capable of a resolution of at least 256×512.
  • Standard keyboard with PS/2 connection.
  • Quartus II 13.0 or higher


The system must be capable of running the Hack machine language. It also must be able to read inputs from the keyboard and write outputs to the monitor.


Similar Designs


The DP32, implemented in Ashenden’s “The VHDL Cookbook”, is a processor architecture with a comparable instruction set, bus architecture, and behavioral description as the Hack architecture. The architecture of the DP32 is more advanced than the Hack computer system, however, a full VHDL example is available in the text.

The memory on the DP32 will consists of 32 bit words versus the 16-bit words in Hack. Both the DP32 and Hack processors will execute instructions stored in the memory with the use of an auto-incrementing Program Counter.

The DP32 communicates through the use of synchronous addresses and data buses, with 2 clock inputs through a two phase single clock. The Hack architecture will run off of a single clock.



The proposed design for the DP32 uses bidirectional bus to read from a single memory. The Hack architecture differs from this approach in that there are two separate memories and read/write busses are kept separated.

Figure 2. Example test bench for DP32 processor. Reprinted from The VHDL Cookbook (p. 7-18), by P. Ashenden. Copyright 1990.


Ashenden’s “The Designer’s Guide to VHDL” provides a good example showing the VHDL code for a similar system in which an embedded controller uses a processor with a program stored in a ROM.

In addition, Ashenden reviews how to create memory packages that are able to read/write to memories and load a memory file. The examples shown by Ashenden also display the use of different memory sizes, address ranges, and data types, which will be applicable to our design.

In Pong Chu’s Prototyping by VHDL Examples, Dr. Chu proposes a design a VGA driving chip that displays images with data from an arbitrary source. Dr. Chu also reviews the theory of operation for standard VGA. If we study the design we may be able to adapt a similar VGA driver to access the memory map within the Hack Computer Architecture.


Additionally, in his book, Dr. Chu reviews the theory of operation of a PS2 keyboard and proposes an option for receiving the keyboard’s serial protocol and converting it to key codes. However, the PS2 protocol is very active and we will need to determine the best way to map the current key pressed to memory in a simple manner.



Customer Profile


This project will be especially attractive towards the person who wants to really know what goes on behind the scenes of a computer, and how it works from the beginning. Today’s computers are so complicated and involve so many obscure interfaced and proprietary implementations that people have lost all clarity of the fundamental ideas that make a computer work (Nisan, N. & Schocken, S., 2008). The way most of the computer science classes are taught is the students are rushed through the major concepts behind computer programming and engineering, and are not able to fully appreciate how all the different components work together.

The person who wants to understand what this project consists of will want to know how the FPGA board is programmed using the VHDL language, how the ROM and RAM are programmed, and how everything is able to work together to take input from a keyboard, and output characters to a LCD screen. This is not going to be a new computer you would go buy at a store today, this is going to be a basic, but very powerful computer that teaches you what happens behind the scenes. This is a project based off of how the beginning of development leads to the end product, which is a fully working computer that can later be programmed to run applications and games, and anything else a programmer wants it to do.


Environment Profile


Since this is a basic computer with the hardware being somewhat exposed, this project will need to be in a controlled environment, whether that is a basic room, office, or classroom. If a person were to construct a box for the FPGA board, then that would give a person a little more leeway as far as the kind of environment it could withstand. Altera does set the commercial temperature standard for their boards at a range of 0°C – 85°C (Altera, 2016). Essentially though, this is a computer and should be treated and maintained as any typical computer that is in a home/work office or classroom.


Feasibility Discussion


While this project is large and has many challenges, there are several factors that increase the feasibility of completing the project.

The primary factor that increases the feasibility of our project is the existing support infrastructure that is available for the closely related Nand2Tetris project that accompanies the Elements of Computing Systems. The Nand2Tetris project provides insight to development planning, test routines that could be adapted or used as examples, and software simulators that could validate the outputs of the software modules we build in Phase 2 and 3.

Additionally, with the selection of the appropriate FPGA development board there will be minimal hardware development required. The FPGA development board will be an industrial strength & stable system to host our digital hardware design.

In contrast, the FPGA development board will also add challenges and prerequisite knowledge requirements that we will need to research and understand to make the project successful. While we were exposed to the VHDL language in ECET230, we will need to make a concerted group effort to ensure that we have background knowledge required to handle the complexity of our proposed digital designs.

Fortunately, many of these designs such as ROM, RAM, VGA Controller, and PS/2 Controller are industry standards which will be able to research through academic texts and reference designs.

Lastly, depending on our development pace, there may be too much scope to complete within the allotted time for the Senior Project. To address this concern we have decided to break the overall project into 3 phases. The subsequent faces will only be pursued if there is enough time to complete enough of the work to have a full, tested, and presentable product.


List of Materials


  FPGA development board VGA Monitor PS/2 Keyboard Monitor Cable
Terasic DE0-CV Dell 17” Flat Panel LCD Monitor Model E176FP V7 Standard PS/2 Keyboard 15 ft Monitor VGA Cable
Part Number PP0192 E173FP CK0A2-4N6P MXT101MM15
Price $99 $39 $14.52 $9.99


There are several hardware and software components required to develop the Hack computer system. The hardware described in the Project Description can be realized with an FPGA development board, a PS/2 keyboard, and a VGA monitor. In addition, software will be needed the FPGA development, and FPGA simulation. Lastly, a programming IDE will be needed for the software components in the later phases of the project.

The detailed requirements for each component can be found below.


FPGA Development Board

The FPGA development board must be able to support the following digital hardware components:

  • 16-bit Hack CPU composed of ALU, registers, program counter, and control logic.
  • 32 KB of ROM
  • 32 KB of RAM
  • VGA Driver chip
  • PS/2 Driver chip

In addition it would be beneficial if the development board supported a VGA connector, a PS/2 connector, and simple programming interface for setting up the board.

The DE0-CV Board meets all the above requirements.

  • DE0-CV Board
    • Part Number: PP0192
    • Price $99
    • Available here.

As shown above the DE0-CV development board with the Altera Cyclone V device meets all the hardware criteria to support our project initiative. An FPGA development board is an integrated circuit that is open to being configured by the designer to meet his/her needs. The FPGA development board has LEDs that show the status of the board regarding different inputs.  It plays the roles of reading and writing the memory and also interfacing w/serial devices since it is an open source tool.

In the hack computer, the FGPA development board is required to act as a circuit board that will support some other components used in this project among them being the Hack CPU composed of ALU, registers, program counter, and control logic, ROM, RAM, VGA Driver chip and the PS/2 Driver chip. The FPGA will also allow communication to take place between these devices embedded on it.

16-bit Hack CPU: The CPU is needed in the hack computer to play a role of performing all the processing operations of the computer.

32 KB of ROM: In a hack computer the ROM (Read Only Memory) is needed to store all the instruction permanently that the hack computer needs to perform its role.

32 KB of RAM: The RAM (Read Access Memory) is required in the hack computer to perform its role of storing temporary information that is to be processed by the CPU

VGA Driver chip: The VGA driver chip will be used to set up the VGA monitor and its components which include a VGA card and a VGA cable.

PS/2 Driver Chip: This chip will be required to connect the cables from the PS/2 keyboard and mouse to the ports.

For the hack computer project we are allowing the use of any keyboard or monitor and will not standardize to a single brand / model unless we run into incompatibilities. We allow this non-standardization for flexibility amongst our team members to acquire these components from available means and because the keyboards and monitor complies to a standard. To be clear every PS/2 keyboard and VGA monitor should behave the same.

VGA Monitor

The VGA monitor will need to be able to support a 640×480 screen resolution at 60 Hz refresh rate.

The following monitor is one option that will meet our requirements:

  • Dell 17” Flat Panel LCD Monitor Model E176FP
    • Part Number: E173FP
    • Price: $39
    • Available here.

VGA monitors use VGA cards.  They have a high resolution as compared to other monitors, and they can also produce color pattern output. In the hack computer system, the VGA monitor is needed to provide a user output interface for the DEO-CV board.


PS/2 Keyboard

A standard PS/2 Keyboard will be needed. In the hack system project, the PS/2 keyboard will be used together with the mouse on the DEO-CV board to receive inputs, respond to commands and navigate results respectively.

The following keyboard is one option to meet this requirement:

  • V7 Standard PS/2 Keyboard Combo, Black
    • Part Number: CK0A2-4N6P
    • Price: $14.52
    • Available here.


Monitor Cable

A standard cable will be needed to connect the monitor and development board. The following cable is one option.

  • com 15 ft Monitor VGA Cable – HD15 MM – VGA cable
    • Part Number: MXT101MM15
    • Price: $9.99
    • Available here.

Risks Identified


VGA & PS/2 Controller Development

In the Nand2Tetris project, the screen and keyboard subsystems are abstracted as part of the simulator therefore there isn’t any direct guidance as to how they should be implemented. We will need to plan and design how the VGA & PS/2 chips interact with the core CPU & Memory systems. In addition, the VGA & PS/2 chips themselves will need to be designed from scratch.

FPGA Clock

In the Nand2Tetris project, the system clock is simulated whereas we will need to synchronize the system with PLL clock on the development board. To ensure that all clocked components (CPU, Memory, PS/2, VGA) stay synchronized we will need to carefully test the timing as we develop the system. It will be very difficult to identify, troubleshoot, and resolve issues timing issues if the subsystems do not stay synchronized with each other.

FPGA Development Board Capabilities

As we have not completed the detailed VHDL design of subsystem it is difficult to predict how many memory bits or logic elements will be required to generate all components. There is a risk that we have selected an FPGA board that does not have a powerful enough FPGA device to allow instantiation of our entire design. If this is the case we will need to order a upgrade to a development board with a more powerful FPGA device.

 Development Time Constraint

As previously discussed a significant project risk is that we will not be able to complete all project tasks within the available time. To overcome this risk we are working on simple design exercises to refresh everyone’s abilities on the design tools required to work an FPGA development board.


Resource Requirements


FPGA Development Software

  • Quartus II 16.0
  • Modelsim-Altera

The DE0-CV development board is designed to operate using the Quartus 2 software and the Altera Modelsim simulator. This software will provide the required programming environment to develop a hack computer. This software is necessary to be able to write and test the software required by the hack computer, and the modelsim software is also required to model the signal processing.


Programming IDE Software

  • Visual Studio / NetBeans

The IDE is software that contains all the tools required by the software developer to write and test software for the high level language components of this system. For a hack computer project, we will develop a system that has high capabilities, to do this, the IDE will be necessary since it contains all the tools for coding and testing.



All the components mentioned above work together as explained below to implement a successful hack computer. First, all the control circuits are set into the FPGA development board before performing any task. Then using the control panel that comes with the DEO-CV board users can access the various components from their host computer. Communication between the host computers and the development board happen through the USB connection. The monitor provides the interface that performs all the data transfers requests between the DEO-CV board and the computer. From the above discussion, it is evident that to make a hack computer all the mentioned components are required. The reason that makes them needed is that they all play different functions that are needed to make the hack computer project successful.


Project Design

1.      RAM

2.      ROM

3.      Hack CPU

4.      VGA Controller

5.      PS2 Controller

6.      System Integration


Simulation Plans

1.      RAM

2.      ROM

3.      Hack CPU

4.      VGA Controller

5.      PS2 Controller

6.      System Integration


Simulation Results

1.      RAM

2.      ROM

3.      Hack CPU

4.      VGA Controller

5.      PS2 Controller

6.      System Integration


Test Plans

1.      RAM

2.      ROM

3.      Hack CPU

4.      VGA Controller

5.      PS2 Controller

6.      System Integration


Test Results

1.      RAM

2.      ROM

3.      Hack CPU

4.      VGA Controller

5.      PS2 Controller

6.      System Integration


Project Work Breakdown Structure


# Task Name Assigned To
1 Hack Computer System All
1.1 Hardware  
1.1.1 RAM Design Write Subsystem Specification Develop Subsystem Simulate Write Simulation Test Plan Develop Simulation Test Bench Perform Simulation / Document Results Test Write Test Plan Develop Hardware Test Harness Perform Test / Document Results  
1.1.2 ROM Design Write Subsystem Specification Develop Subsystem Simulate Write Simulation Test Plan Develop Simulation Test Bench Perform Simulation / Document Results Test Write Test Plan Develop Hardware Test Harness Perform Test / Document Results  
1.1.3 Hack CPU Design Write Subsystem Specification Develop Subsystem Simulate Write Simulation Test Plan Develop Simulation Test Bench Perform Simulation / Document Results Test Write Test Plan Develop Hardware Test Harness Perform Test / Document Results  
1.1.4 PS2 Controller Design Write Subsystem Specification Develop Subsystem Simulate Write Simulation Test Plan Develop Simulation Test Bench Perform Simulation / Document Results Test Write Test Plan Develop Hardware Test Harness Perform Test / Document Results  
1.1.5 VGA Controller Design Write Subsystem Specification Develop Subsystem Simulate Write Simulation Test Plan Develop Simulation Test Bench Perform Simulation / Document Results Test Write Test Plan Develop Hardware Test Harness Perform Test / Document Results  
1.1.6 System Integration Design Write System Integration Plan Adapt / Adjust Subsystems as Needed Develop Top Level Design Simulate Write Simulation Test Plan Develop Simulation Test Bench Perform Simulation / Document Results Test Write Test Plan Develop Hardware Test Harness Perform Test / Document Results  
1.2 Software  
1.2.1 Assembler Design Write Software Requirements Specification Design Software Test Write Software Test Plan Execute Test / Document Results  
1.2.2 Hack Assembly Test Program Design Write Test Program Specification Develop Test Program Test Write Test Program Test Plan Execute Test / Document Results Execute Test Program on Hack Computer System  
2 Jack Language Implementation  Optional
3 OS / Application Implementation  Optional


Project Schedule

Gantt chart with completion bars.

Lessons Learned

Anything you would do differently moving forward during the senior project phase.

Suggestion: Keep a design journal / log as we go


Works Cited


Altera. (2012). Cyclone III Device Handbook: Volume 1. Acquired from:

Altera. (2016). Enhanced Temperature Device Support. Retrieved August 13, 2016, from

Ashenden, P. J. (2008). The Designer’s Guide to VHDL. Burlington, MA: Morgan Kaufmann Publishers.

Ashenden, P. J. (1990). The VHDL Cookbook (First Edition). Retrieved July 24, 2016,

from – Ch. 7


Chu, P. P. (2008). FPGA Prototyping by VHDL Examples: Xilinx Spartan-3 Version. Hoboken, NJ: John Wiley & Sons, Inc..

Nisan, N. & Schocken, S. (2008). The Elements of Computing Systems: Building a Modern Computer from First Principles. Cambridge, MA: The MIT Press.




Works Consulted

Provide a list of internal and/or external people you have consulted with.





Appendix B: Any Data / Source Code, etc.

Appendix C: Datasheets


Need Help- Project Proposal

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